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| 19-1536; Rev 1; 12/99 S ANUAL N KIT M LUATIO ATA SHEET EVA WD FOLLO High-Speed Step-Down Controller for Notebook Computers Features o Ultra-High Efficiency o No Current-Sense Resistor (Lossless ILIMIT) o Quick-PWM with 100ns Load-Step Response o 1% VOUT Accuracy Over Line and Load o 2.5V/3.3V Fixed or 1V to 5.5V Adjustable Output Range o 2V to 28V Battery Input Range o 200/300/450/600kHz Switching Frequency o Overvoltage Protection (MAX1714A) o Undervoltage Protection o 1.7ms Digital Soft-Start o Drives Large Synchronous-Rectifier FETs o 2V 1% Reference Output o Power-Good Indicator General Description The MAX1714 pulse-width modulation (PWM) controller provides the high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high-voltage batteries to generate lowvoltage CPU core or chip-set/RAM supplies in notebook computers. Maxim's proprietary Quick-PWMTM quick-response, constant-on-time PWM control scheme handles wide input/output voltage ratios with ease and provides 100ns "instant-on" response to load transients while maintaining a relatively constant switching frequency. The MAX1714 achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronousrectifier MOSFETs. Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. Alternatively, two-stage conversion (stepping down the +5V system supply instead of the battery) at a higher switching frequency allows the minimum possible physical size. The MAX1714 is intended for CPU core, chipset, DRAM, or other low-voltage supplies as low as 1V. The MAX1714A is available in a 20-pin QSOP package and includes overvoltage protection. The MAX1714B is available in a 16-pin QSOP package with no overvoltage protection. For applications requiring VID compliance or DAC control of output voltage, refer to the MAX1710/MAX1711 data sheet. For a dual output version, refer to the MAX1715 data sheet. MAX1714 Ordering Information PART MAX1714AEEP MAX1714BEEE TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 20 QSOP 16 QSOP Minimal Operating Circuit BATTERY 4.5V TO 28V +5V INPUT VCC SHDN VDD V+ Applications Notebook Computers CPU Core Supply ILIM BST DH OUTPUT 1.25V TO 2V Chipset/RAM Supply as Low as 1V 1.8V and 2.5V I/O Supply MAX1714 REF DL PGOOD PGND (GND) FB OUT SKIP LX Quick-PWM is a trademark of Maxim Integrated Products. Future product--contact factory for availability. Pin Configurations appear at end of data sheet. AGND (GND) ( ) ARE FOR THE MAX1714B ONLY. ________________________________________________________________ Maxim Integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. High-Speed Step-Down Controller for Notebook Computers MAX1714 ABSOLUTE MAXIMUM RATINGS V+ to AGND (Note 1)..............................................-0.3V to +30V LX to BST..................................................................-6V to +0.3V VDD, VCC to AGND (Note 1) .....................................-0.3V to +6V REF Short Circuit to AGND.........................................Continuous PGND to AGND (Note 1) ................................................... 0.3V Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C)..........667mW SHDN, PGOOD, OUT to AGND (Note 1)..................-0.3V to +6V 20-Pin QSOP (derate 9.1mW/C above +70C)..........727mW ILIM, FB, REF, SKIP, Operating Temperature Range ..........................-40C to +85C TON to AGND (Notes 1, 2)....................-0.3V to (VCC + 0.3V) DL to PGND (Note 1)..................................-0.3V to (VDD + 0.3V) Junction Temperature ......................................................+150C BST to AGND (Note 1) ...........................................-0.3V to + 36V Storage Temperature Range ............................-65C to +150C DH to LX.....................................................-0.3V to (BST + 0.3V) Lead Temperature (soldering, 10s) .................................+300C Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND. Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC = VDD = +5V, SKIP = AGND, TA = 0C to +85C, unless otherwise noted.) (Note 1) PARAMETER Input Voltage Range Error Comparator Threshold (DC Output Voltage Accuracy) (Note 3) Load Regulation Error Line Regulation Error FB Input Bias Current OUT Input Resistance Soft-Start Ramp Time FB = AGND Rising edge of SHDN to full ILIM TON = AGND (600kHz) On-Time V+ = 24V, VOUT = 2V (Note 4) (Note 4) FB forced above the regulation point FB forced above the regulation point V SHDN = 0 V SHDN = 0 V SHDN = 0 , V+ = 28V, VCC = VDD = 0 or 5V VCC = 4.5V to 5.5V, no external REF load IREF = 0 to 50A REF in regulation Falling edge, hysteresis = 40mV 10 1.6 1.98 TON = REF (450kHz) TON = unconnected (300kHz) TON = VCC (200kHz) Minimum Off-Time Quiescent Supply Current (VCC) Quiescent Supply Current (VDD) Quiescent Supply Current (V+) Shutdown Supply Current (VCC) Shutdown Supply Current (VDD) Shutdown Supply Current (V+) Reference Voltage Reference Load Regulation REF Sink Current REF Fault Lockout Voltage 140 175 260 380 Battery voltage, V+ VCC, VDD FB = OUT V+ = 4.5V to 28V, SKIP = VCC ILOAD = 0 to 3A, SKIP = VCC VCC = 4.5V to 5.5V, V+ = 4.5V to 28V -0.1 100 190 1.7 160 200 290 425 400 550 <1 25 <1 <1 <1 2 180 225 320 470 500 750 5 40 5 5 5 2.02 0.01 ns A A A A A A V V A V ns FB = AGND FB = VCC CONDITIONS MIN 2 4.5 0.99 2.475 3.267 1.0 2.5 3.3 9 5 0.1 300 TYP MAX 28 5.5 1.01 2.525 3.333 mV mV A k ms V UNITS V 2 _______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC = VDD = +5V, SKIP = AGND, TA = 0C to +85C, unless otherwise noted.) (Note 1) PARAMETER Overvoltage Trip Threshold Overvoltage Fault Propagation Delay Output Undervoltage Protection Threshold Output Undervoltage Protection Blanking Time Current-Limit Threshold (Positive Direction, Fixed) Current-Limit Threshold (Positive Direction, Adjustable) Current-Limit Threshold (Negative Direction) Current-Limit Threshold (Zero Crossing) PGOOD Propagation Delay PGOOD Output Low Voltage PGOOD Leakage Current Thermal Shutdown Threshold VCC Undervoltage Lockout Threshold DH Gate-Driver On-Resistance DL Gate-Driver On-Resistance (Pull-Up) DL Gate-Driver On-Resistance (Pull-Down) DH Gate-Driver Source/Sink Current DL Gate-Driver Source Current DL Gate-Driver Sink Current Dead Time SKIP Input Current Logic Threshold PGOOD Trip Threshold Logic Input High Voltage Logic Input Low Voltage Logic Input Current ILIM Input Current CONDITIONS With respect to error comparator threshold (MAX1714A only) FB forced 2% above trip threshold (MAX1714A only) With respect to error comparator threshold From SHDN signal going high PGND - LX, ILIM = VCC PGND - LX VILIM = 0.5V VILIM = 2.0V 65 10 90 40 170 -90 100 50 200 -120 3 1.5 0.4 1 150 4.1 1.5 1.5 0.5 1 1 3 35 26 -1.5 -8 2.4 0.8 -1 10 1 -6 -0.1 -4 4.4 5 5 1.7 MIN 10.5 TYP 12.5 1.5 70 75 30 110 60 230 -140 MAX 14.5 UNITS % s % ms mV mV % mV s V A C V A A A ns mA % V V A nA 3 MAX1714 PGND - LX, SKIP = VCC, TA = +25C, with respect to positive current-limit threshold PGND - LX, SKIP = AGND FB forced 2% below PGOOD trip threshold, falling edge ISINK = 1mA High state, forced to 5.5V Hysteresis = 10C Rising edge, hysteresis = 20mV, PWM disabled below this level BST - LX forced to 5V DL, high state DL, low state DH forced to 2.5V, BST - LX forced to 5V DL forced to 2.5V DL forced to 2.5V DL rising DH rising To disable overvoltage and undervoltage fault detection, TA = +25C Measured at FB with respect to error comparator threshold, falling edge SHDN, SKIP SHDN, SKIP SHDN, SKIP SHDN, SKIP _______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC = VDD = +5V, SKIP = AGND, TA = 0C to +85C, unless otherwise noted.) (Note 1) PARAMETER TON VCC Level TON Float Voltage TON Reference Level TON AGND Level TON Input Current Forced to AGND or VCC -3 CONDITIONS MIN VCC - 0.4 3.15 1.65 3.85 2.35 0.5 3 TYP MAX UNITS V V V V A ELECTRICAL CHARACTERISTICS (Circuit of Figure 1, 4A components from Table 1, V+ = 15V, VCC = VDD = +5V, SKIP = AGND, TA = -40C to +85C, unless otherwise noted.) (Notes 1, 5) PARAMETER Input Voltage Range Error Comparator Threshold (DC Output Voltage Accuracy) (Note 3) Battery voltage, V+ VCC, VDD FB = OUT V+ = 4.5V to 28V, SKIP = VCC FB = AGND FB = VDD CONDITIONS MIN 2 4.5 0.985 2.462 3.25 140 175 260 380 TYP MAX 28 5.5 1.015 2.538 3.35 180 225 320 470 500 750 1.98 10 65 85 35 160 4.1 2.4 0.8 -1 1 2.02 15 75 115 65 240 4.4 ns A V % % mV mV V V V A ns V UNITS V TON = AGND (600kHz) On-Time V+ = 24V, VOUT = 2V (Note 4) (Note 4) FB forced above the regulation point VCC = 4.5V to 5.5V, no external REF load With respect to error comparator threshold (MAX1714A only) With respect to error comparator threshold TON = REF (450kHz) TON = unconnected (300kHz) TON = VCC (200kHz) Minimum Off-Time Quiescent Supply Current (VCC) Reference Voltage Overvoltage Trip Threshold Output Undervoltage Protection Threshold Current-Limit Threshold (Positive PGND - LX, ILIM = VCC Direction, Fixed) Current-Limit Threshold (Positive Direction, Adjustable) VCC Undervoltage Lockout Threshold Logic Input High Voltage Logic Input Low Voltage Logic Input Current PGND - LX VILIM = 0.5V VILIM = 2.0V Rising edge, hysteresis = 20mV, PWM disabled below this level SHDN, SKIP SHDN, SKIP SHDN, SKIP 4 _______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC = VDD = +5V, SKIP = AGND, TA = -40C to +85C, unless otherwise noted.) (Notes 1, 5) PARAMETER PGOOD Trip Threshold PGOOD Output Low Voltage PGOOD Leakage Current CONDITIONS Measured at FB with respect to error comparator threshold, falling edge ISINK = 1mA High state, forced to 5.5V MIN -8 TYP MAX -4 0.4 1 UNIT % V A MAX1714 Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND. Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum. Note 3: When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the errorcomparator threshold by 50% of the ripple. In discontinuous conduction (SKIP = AGND, light-loaded), the output voltage will have a DC regulation level higher than the trip level by approximately 1.5% due to slope compensation. Note 4: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, VBST = 5V, and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds. Note 5: Specifications to -40C are guaranteed by design, not production tested. __________________________________________Typical Operating Characteristics (Circuit of Figure 1, components from Table 1, VIN = +15V, SKIP = AGND, TON = unconnected, TA = +25C, unless otherwise noted.) EFFICIENCY vs. LOAD CURRENT (1.5A COMPONENTS, VOUT = 2.5V, TON = GND, 600kHz) VIN = 5V MAX1714B-03 EFFICIENCY vs. LOAD CURRENT (4A COMPONENTS, VOUT = 2.5V, 300kHz) MAX1714B-01 EFFICIENCY vs. LOAD CURRENT (8A COMPONENTS, VOUT = 1.6V, 300kHz) VIN = 7V 90 EFFICIENCY (%) EFFICIENCY (%) 10 MAX1714B-02 100 VIN = 7V 90 EFFICIENCY (%) 100 100 90 80 VIN = 20V VIN = 12V 80 VIN = 12V VIN = 20V 80 70 70 70 60 0.01 0.1 1 10 LOAD CURRENT (A) 60 0.01 0.1 1 LOAD CURRENT (A) 60 0.01 0.1 1 10 LOAD CURRENT (A) _______________________________________________________________________________________ 5 High-Speed Step-Down Controller for Notebook Computers MAX1714 _____________________________Typical Operating Characteristics (continued) (Circuit of Figure 1, components from Table 1, VIN = +15V, SKIP = AGND, TON = unconnected, TA = +25C, unless otherwise noted.) FREQUENCY vs. LOAD CURRENT (4A COMPONENTS, VOUT = 2.5V) VIN = 7V, 15V, PWM MODE 300 FREQUENCY (kHz) 250 200 150 100 50 0 0.01 0.1 1 10 LOAD CURRENT (A) 280 0 5 10 15 20 25 30 INPUT VOLTAGE (V) VIN = 7V SKIP MODE VIN = 15V SKIP MODE MAX1714B-04 FREQUENCY vs. INPUT VOLTAGE (4A COMPONENTS, VOUT = 2.5V, IOUT = 1A) MAX1714B-05 FREQUENCY vs. TEMPERATURE (4A COMPONENTS, VOUT = 2.5V) MAX1714B-06 350 320 330 325 FREQUENCY (kHz) 320 315 310 305 300 -40 -20 0 20 40 60 80 TEMPERATURE (C) IOUT = 1A IOUT = 4A 310 FREQUENCY (kHz) 300 290 IOUT AT CURRENT LIMIT vs. TEMPERATURE (4A COMPONENTS, VOUT = 2.5V) MAX1714B-07 CONTINUOUS TO DISCONTINUOUS INDUCTOR CURRENT POINT vs. INPUT VOLTAGE (4A COMPONENTS, VOUT = 2.5V) MAX1714B-08 INDUCTOR CURRENT PEAKS AND VALLEYS vs. INPUT VOLTAGE (4A COMPONENTS, AT CURRENT-LIMIT TRIP POINT) 8 INDUCTOR CURRENT (A) 7 6 5 4 3 2 IVALLEY MAX1714B-09 12 10 OUTPUT CURRENT (A) 8 6 4 2 0 -40 -20 0 20 40 60 80 TEMPERATURE (C) VILIM = 0.5V VILIM = 1V 700 600 LOAD CURRENT (mA) 500 400 300 200 100 0 0 5 10 15 20 25 9 IPEAK 1 0 30 0 5 10 15 20 25 30 INPUT VOLTAGE (V) INPUT VOLTAGE (V) NO-LOAD SUPPLY CURRENT (4A COMPONENTS, SKIP MODE, 300kHz) MAX1714B-10 MAX1714B-11 ICC 500 SUPPLY CURRENT (A) 400 300 200 100 IIN 0 SUPPLY CURRENT (A) SUPPLY CURRENT (mA) 600 ICC 8 IIN 6 IDD 400 4 200 IIN 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) IDD 2 ICC 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) IDD 5.0 5.5 6.0 4.0 4.5 VCC, VDD, VIN INPUT VOLTAGE (V) 6 _______________________________________________________________________________________ MAX1714B-12 800 10 NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE (4A COMPONENTS, PWM MODE, 300kHz) 600 NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE (1.5A COMPONENTS, SKIP MODE, VOUT = 2.5V, 600kHz) High-Speed Step-Down Controller for Notebook Computers _____________________________Typical Operating Characteristics (continued) (Circuit of Figure 1, components from Table 1, VIN = +15V, SKIP = AGND, TON = unconnected, TA = +25C, unless otherwise noted.) LOAD-TRANSIENT RESPONSE (4A COMPONENTS, VOUT = 2.5V, 300kHz) MAX1714B-13 MAX1714 LOAD-TRANSIENT RESPONSE (8A COMPONENTS, VOUT = 1.6V, 300kHz) MAX1714B-14 LOAD-TRANSIENT RESPONSE (1.5A COMPONENTS, VIN = 5V, VOUT = 2.5V, 600kHz) A MAX1714B-15 A A B B B C C 10s/div A = VOUT, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 2A/div C = DL, 10V/div 10s/div A = VOUT, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div C 5s/div A = VOUT, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 1A/div C = DL, 5V/div START-UP WAVEFORM (4A COMPONENTS, IOUT = 4A, ACTIVE LOAD, VOUT = 2.5V, 300kHz) MAX1714B-16 OUTPUT OVERLOAD WAVEFORM (4A COMPONENTS, VOUT = 2.5V, 300kHz) MAX1714B-17 SHUTDOWN WAVEFORM (4A COMPONENTS, VOUT = 2.5V, 300kHz) MAX1714B-18 A OUTPUT UNDERVOLTAGE PROTECTION THRESHOLD A B A B B C C C 500s/div A = VOUT, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div 200s/div A = VOUT, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div 50s/div A = VOUT, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div _______________________________________________________________________________________ 7 High-Speed Step-Down Controller for Notebook Computers MAX1714 Pin Description PIN MAX1714A 1 2, 9, 11 3 4 PIN NAME MAX1714B 1 - 2 3 DH N.C. SHDN FB High-Side Gate Driver Output. Swings from LX to BST. No Connection. These pins are not connected to any internal circuitry. Connect N.C. pins to the ground plane to enhance thermal conductivity. Shutdown Control Input. Drive SHDN to AGND to force the MAX1714 into shutdown. Drive or connect to VCC for normal operation. A rising edge on SHDN clears the fault latch. Feedback Input. Connect to AGND for a +2.5V fixed output or to VCC for a +3.3V fixed output, or connect FB to a resistor divider from OUT for an adjustable output. Output Voltage Connection. Connect directly to the junction of the external and output filter capacitors. OUT senses the output voltage to determine the on-time and also serves as the feedback input in fixed-output modes. Current-Limit Threshold Adjustment. Connect ILIM to VCC for 100mV current-limit threshold. For an adjustable threshold, connect an external voltage source to ILIM, or use a two-resistor divider from REF to AGND. The external adjustment range of 0.5V to 2.0V corresponds to a current-limit threshold of 50mV to 200mV. +2.0V Reference Voltage Output. Bypass to AGND with 0.22F (minimum) capacitor. Can supply 50A for external loads. Analog Ground. Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 6% below the normal regulation point or during soft-start. PGOOD is high impedance when the output is in regulation and the soft-start circuit has terminated. Analog and Power Ground. AGND and PGND connect together internally. Power Ground. Connect directly to the low-side MOSFET's source. Serves as the negative input of the current-limit comparator. Low-Side Gate-Driver Output. Swings from PGND to VDD. Supply Input for the DL Gate Drive. Connect to the system supply voltage, +4.5V to +5.5V. Bypass to PGND with a 1F (min) ceramic capacitor. Analog-Supply Input. Connect to the system supply voltage, +4.5V to +5.5V, with a series 20 resistor. Bypass to AGND with a 1F (min) ceramic capacitor. On-Time Selection-Control Input. This is a four-level input used to determine DH on-time. Connect to AGND, REF, or VCC, or leave TON unconnected to set the following switching frequencies: AGND = 600kHz, REF = 450kHz, floating = 300kHz, and VCC = 200kHz. Battery Voltage Sense Connection. Connect to input power source. V+ is used only to set the PWM one-shot timing. Pulse-Skipping Control Input. Connect to VCC for low-noise forced-PWM mode. Connect to AGND to enable pulse-skipping operation. Boost Flying-Capacitor Connection. Connect to an external capacitor and diode according to the Standard Application Circuit (Figure 1). See MOSFET Gate Drivers (DH, DL) section. External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the lower supply rail for the DH high-side gate driver. LX is also the positive input to the current-limit comparator. FUNCTION 5 4 OUT 6 5 ILIM 7 8 10 - 12 13 14 15 6 - 7 8 - 9 10 11 REF AGND PGOOD GND PGND DL VDD VCC 16 12 TON 17 18 19 13 14 15 V+ SKIP BST 20 16 LX 8 _______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers Standard Application Circuit The standard application circuit (Figure 1) generates a low-voltage rail for general-purpose use in a notebook computer (I/O supply, fixed CPU core supply, DRAM supply). This DC-DC converter steps down a battery or AC adapter voltage to voltages from 1.0V to 5.5V with high efficiency and accuracy. See Table 1 for a list of component selections for common applications. Table 2 lists component manufacturers. Detailed Description The MAX1714 buck controller is targeted for low-voltage power supplies for notebook computers. Maxim`s proprietary Quick-PWM pulse-width modulator in the MAX1714 is specifically designed for handling fast load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circumvents the poor load-transient timing problems of fixedfrequency current-mode PWMs while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constant-offtime PWM schemes. MAX1714 VIN 4.5V TO 28V +5V BIAS SUPPLY C5 4.7F R1 20 C6 3.3F C1 VCC V+ ON/OFF CONTROL LOW-NOISE CONTROL SHDN SKIP MAX1714 VDD BST DH D2 CMPSH-3 Q1 C7 0.1F L1 VOUT C2 LX DL Q2 D1 PGND (GND) TON REF C4 0.22F AGND (GND) +5V R2 100k PGOOD POWER-GOOD INDICATOR FB OUT ILIM +5V ( ) = ARE FOR THE MAX1714B ONLY. NOTE: IN THE MAX 1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN. Figure 1. Standard Application Circuit _______________________________________________________________________________________ 9 High-Speed Step-Down Controller for Notebook Computers MAX1714 Table 1. Component Selection for Standard Applications COMPONENT Input Range Frequency Q1 High-Side MOSFET Q2 Low-Side MOSFET D2 Rectifier 7V to 20V 300kHz Fairchild Semiconductor 1/2 FDS6982A Fairchild Semiconductor 1/2 FDS6982A Nihon EP10QY03 6.8H Coilcraft DO3316P-682 10F, 25V Taiyo Yuden TMK432BJ106KM 470F, 6V Kemet T510X477108M006AS 2.5V AT 4A 7V to 20V 300kHz 1.6V AT 8A 600kHz 2.5V AT 1.5A 4.5V to 5.5V International Rectifier IRF7811 Fairchild Semiconductor FDS6670A Motorola MBRS340T3 1.5H Sumida CEP1251R5MC (2) 10F, 25V Taiyo Yuden TMK432BJ106KM (2) 470F 6V Kemet T510X477108M006AS International Rectifier 1/2 IRF7301 International Rectifier 1/2 IRF7301 Motorola MBR0520LT1 3.3H Coiltronics UP1B-3R3 100F, 10V Sanyo POSCAP 10TPA100M 100F, 10V Sanyo POSCAP 10TPA100M L1 Inductor C1 Input Capacitor C2 Output Capacitor Table 2. Component Suppliers MANUFACTURER AVX Central Semiconductor Coilcraft Coiltronics Fairchild International Rectifier Kemet Matsuo Motorola Murata NIEC (Nihon) Sanyo Siliconix Sprague Sumida Taiyo Yuden TDK *Distributor USA PHONE 803-946-0690 516-435-1110 847-639-6400 561-241-7876 408-822-2181 310-322-3331 408-986-0424 714-969-2491 602-303-5454 814-237-1431 800-831-9172 805-867-2555* 619-661-6835 408-988-8000 800-554-5565 603-224-1961 847-956-0666 408-573-4150 847-390-4461 FACTORY FAX [Country Code] [1] 803-626-3123 [1] 516-435-1824 [1] 847-639-1469 [1] 561-241-9339 [1] 408-721-1635 [1] 310-322-3332 [1] 408-986-1442 [1] 714-960-6492 [1] 602-994-6430 [1] 814-238-0490 [81] 3-3494-7414 [81] 7-2070-1174 [1] 408-970-3950 [1] 603-224-1430 [81] 3-3607-5144 [1] 408-573-4159 [1] 847-390-4405 ply the PWM circuit and gate drivers. If stand-alone capability is needed, the +5V supply can be generated with an external linear regulator such as the MAX1615. The battery and +5V bias inputs can be tied together if the input source is a fixed +4.5V to +5.5V supply. If the +5V bias supply is powered up prior to the battery supply, the enable signal (SHDN) must be delayed until the battery voltage is present in order to ensure startup. The +5V bias supply must provide V CC and gate-drive power, so the maximum current drawn is: IBIAS = ICC + f (QG1 + QG2) = 5mA to 30mA (typ) where ICC is 600A typical, f is the switching frequency, and QG1 and QG2 are the MOSFET data sheet total gate-charge specification limits at VGS = 5V. Free-Running, Constant-On-Time PWM Controller with Input Feed-Forward The Quick-PWM control architecture is a pseudo-fixed-frequency, constant-on-time current-mode type with voltage feed-forward (Figure 2). This architecture relies on the output filter capacitor's ESR to act as the current-sense resistor, so the output ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose period is inversely proportional to input voltage and directly proportional to output voltage. Another one-shot sets a minimum off-time (400ns typical). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the current-limit threshold, and the minimum off-time one-shot has timed out. +5V Bias Supply (VCC and VDD) The MAX1714 requires an external +5V bias supply in addition to the battery. Typically, this +5V bias supply is the notebook's 95% efficient +5V system supply. Keeping the bias supply external to the IC improves efficiency and eliminates the cost associated with the +5V linear regulator that would otherwise be needed to sup10 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 IN 2V TO 28V V+ ILIM TOFF TON ON-TIME COMPUTE FROM OUT 1-SHOT TRIG Q 9R R S Q 1-SHOT R Q CURRENT LIMIT SKIP SHDN S Q R MAX1714A ONLY x2 REF -6% REF +12% REF -30% FEEDBACK MUX (SEE FIGURE 9) S2 Q OVP/UVLO LATCH FB NOTE: IN THE MAX1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN. TIMER ERROR AMP REF MAX1714 BST +5V TON TRIG DH LX OUTPUT +5V ZERO CROSSING VDD DL (MAX1714B ONLY) PGND (GND) OUT +5V CHIP SUPPLY VCC PGOOD S1 2V REF REF (GND) AGND ( ) ARE FOR THE MAX1714B ONLY. Figure 2. MAX1714 Functional Diagram On-Time One-Shot (TON) The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. The high-side switch on-time is inversely proportional to the battery voltage as measured by the V+ input, and proportional to the output voltage. This algorithm results in a nearly constant switching frequency despite the lack of a fixed- frequency clock generator. The benefits of a constant switching frequency are twofold: first, the frequency can be selected to avoid noise-sensitive regions such as the 455kHz IF band; second, the inductor ripple-current operating point remains relatively constant, resulting in easy design methodology and predictable output voltage ripple. On-Time = K (VOUT + 0.075V) / VIN ______________________________________________________________________________________ 11 High-Speed Step-Down Controller for Notebook Computers MAX1714 where K is set by the TON pin-strap connection and 0.075V is an approximation to accommodate for the expected drop across the low-side MOSFET switch. One-shot timing error increases for the shorter on-time settings due to fixed propagation delays; it is approximately 12.5% at 600kHz and 450kHz, and 10% at the two slower settings. This translates to reduced switchingfrequency accuracy at higher frequencies (Table 5). Switching frequency increases as a function of load current due to the increasing drop across the low-side MOSFET, which causes a faster inductor-current discharge ramp. The on-times guaranteed in the Electrical Characteristics are influenced by switching delays in the external high-side power MOSFET. Two external factors that influence switching-frequency accuracy are resistive drops in the two conduction loops (including inductor and PC board resistance) and the dead-time effect. These effects are the largest contributors to the change of frequency with changing load current. The dead-time effect increases the effective on-time, reducing the switching frequency as one or both dead times are added to the effective on-time. It occurs only in PWM mode (SKIP = high) when the inductor current reverses at light or negative load currents. With reversed inductor current, the inductor's EMF causes LX to go high earlier than normal, extending the ontime by a period equal to the low-to-high dead time. For loads above the critical conduction point, the actual switching frequency is: VOUT + VDROP1 f= t ON (VIN + VDROP2 ) where VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PC board resistances; VDROP2 is the sum of the resistances in the charging path, and tON is the on-time calculated by the MAX1714. duty-cycle applications, this threshold is relatively constant, with only a minor dependence on battery voltage. I LOAD(SKIP) KVOUT 2L VIN - VOUT VIN where K is the on-time scale factor (Table 5). The loadcurrent level at which PFM/PWM crossover occurs, ILOAD(SKIP), is equal to 1/2 the peak-to-peak ripple current, which is a function of the inductor value (Figure 3). For example, in the standard application circuit with K = 3.3s (Table 5), VOUT = 2.5V, VIN = 15V, and L = 6.8H, switchover to pulse-skipping operation occurs at ILOAD = 0.51A or about 1/8 full load. The crossover point occurs at an even lower value if a swinging (soft-saturation) inductor is used. The switching waveforms may appear noisy and asynchronous when light loading causes pulse-skipping operation, but this is a normal operating condition that results in high light-load efficiency. Trade-offs in PFM noise vs. light-load efficiency are made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full-load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. Penalties for using higher inductor values include larger physical size and degraded load-transient response (especially at low input voltage levels). DC output accuracy specifications refer to the error-comparator threshold of the error comparator. When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the trip level by 50% of the ripple. In discontinuous conduction (SKIP = AGND, light-loaded), the output voltage will have a DC regulation level higher than the error-comparator threshold by approximately 1.5% due to slope compensation. Forced-PWM Mode (SKIP = High) The low-noise forced-PWM mode (SKIP = high) disables the zero-crossing comparator, which controls the lowside switch on-time. This causes the low-side gate-drive waveform to become the complement of the high-side gate-drive waveform. This in turn causes the inductor current to reverse at light loads while DH maintains a duty factor of VOUT/VIN. The benefit of forced-PWM mode is to keep the switching frequency fairly constant, but it comes at a cost: the no-load battery current can be 10mA to 40mA, depending on the external MOSFETs. Forced-PWM mode is most useful for reducing audiofrequency noise, improving load-transient response, providing sink-current capability for dynamic output voltage adjustment, and improving the cross-regulation of Automatic Pulse-Skipping Switchover In skip mode (SKIP low), an inherent automatic switchover to PFM takes place at light loads. This switchover is effected by a comparator that truncates the low-side switch on-time at the inductor current's zero crossing. This mechanism causes the threshold between pulse-skipping PFM and nonskipping PWM operation to coincide with the boundary between continuous and discontinuous inductor-current operation (also known as the "critical conduction" point; see the Continuous to Discontinuous Inductor Current Point vs. Input Voltage graph in the Typical Operating Characteristics). In low- 12 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 i VBATT -VOUT = L t INDUCTOR CURRENT -IPEAK -IPEAK INDUCTOR CURRENT ILOAD ILOAD = IPEAK/2 ILIMIT 0 ON-TIME TIME 0 TIME Figure 3. Pulse-Skipping/Discontinuous Crossover Point Figure 4. ``Valley'' Current-Limit Threshold Point multiple-output applications that use a flyback transformer or coupled inductor. Current-Limit Circuit (ILIM) The current-limit circuit employs a unique "valley" current-sensing algorithm that uses the on-state resistance of the low-side MOSFET as a current-sensing element (Figure 4). If the current-sense voltage (PGND - LX) is above the current-limit threshold, the PWM is not allowed to initiate a new cycle. The actual peak current is greater than the current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact currentlimit characteristic and maximum load capability are a function of the MOSFET on-resistance, inductor value, and battery voltage. The reward for this uncertainty is robust, lossless overcurrent sensing. When combined with the UVP protection circuit, this current-limit method is effective in almost every circumstance. There is also a negative current limit that prevents excessive reverse inductor currents when VOUT is sinking current. The negative current-limit threshold is set to approximately 120% of the positive current limit, and therefore tracks the positive current limit when ILIM is adjusted. The current-limit threshold is adjusted with an external resistor-divider at ILIM. A 1A min divider current is recommended. The current-limit threshold adjustment range is from 50mV to 200mV. In the adjustable mode, the current-limit threshold voltage is precisely 1/10 the voltage seen at ILIM. The threshold defaults to 100mV when ILIM is connected to VCC. The logic threshold for switchover to the 100mV default value is approximately VCC - 1V. The adjustable current limit accommodates MOSFETs with a wide range of on-resistance characteristics (see Design Procedure). Carefully observe the PC board layout guidelines to ensure that noise and DC errors don't corrupt the current-sense signals seen by LX and PGND. Mount or place the IC close to the low-side MOSFET with short, direct traces, making a Kelvin sense connection to the source and drain terminals. MOSFET Gate Drivers (DH, DL) The DH and DL drivers are optimized for driving moderate-sized high-side, and larger low-side power MOSFETs. This is consistent with the low duty factor seen in the notebook environment, where a large VBATT VOUT differential exists. An adaptive dead-time circuit monitors the DL output and prevents the high-side FET from turning on until DL is fully off. There must be a lowresistance, low-inductance path from the DL driver to the MOSFET gate for the adaptive dead-time circuit to work properly; otherwise, the sense circuitry in the MAX1714 will interpret the MOSFET gate as "off" while there is actually still charge left on the gate. Use very short, wide traces measuring no more than 20 squares (50 to 100 mils wide if the MOSFET is 1 inch from the MAX1714). The dead time at the other edge (DH turning off) is determined by a fixed 35ns (typical) internal delay. The internal pull-down transistor that drives DL low is robust, with a 0.5 typical on-resistance. This helps prevent DL from being pulled up during the fast rise-time of the inductor node, due to capacitive coupling from the drain to the gate of the low-side synchronous-rectifier MOSFET. However, for high-current applications, you might still encounter some combinations of high- and low-side FETs that will cause excessive gate-drain coupling, which can lead to efficiency-killing, EMI-producing shoot-through currents. This is often remedied by adding a resistor in series with BST, which increases the turn-on time of the high-side FET without degrading the turn-off time (Figure 5). 13 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 +5V VIN BST 5 DH LX MAX1714 Figure 5. Reducing the Switching-Node Rise Time cycled below 1V. This action turns on the synchronousrectifier MOSFET with 100% duty and, in turn, rapidly discharges the output filter capacitor and forces the output to ground. If the condition that caused the overvoltage (such as a shorted high-side MOSFET) persists, the battery fuse will blow. DL is also kept high continuously when VCC UVLO is active, as well as in shutdown mode (Table 3). Note that DL latching high causes the output voltage to go slightly negative, due to energy stored in the output LC tank circuit when OVP activates. If the load can't tolerate being forced to a negative voltage, it may be desirable to place a power Schottky diode across the output to act as a reverse-polarity clamp. Overvoltage protection can be defeated using the nofault test mode (see No-Fault Test Mode section). POR, UVLO, and Soft-Start Power-on reset (POR) occurs when VCC rises above approximately 2V, resetting the fault latch and soft-start counter, and preparing the PWM for operation. VCC undervoltage lockout (UVLO) circuitry inhibits switching and forces the DL gate driver high (to enforce output overvoltage protection) until V CC rises above 4.2V, whereupon an internal digital soft-start timer begins to ramp up the maximum allowed current limit. The ramp occurs in five steps: 20%, 40%, 60%, 80%, and 100%; 100% current is available after 1.7ms 50%. A continuously adjustable analog soft-start function can be realized by adding a capacitor in parallel with the ILIM resistor. This soft-start method requires a minimum interval between power-down and power-up to discharge the capacitor. Output Undervoltage Protection The output undervoltage protection (OVP) function is similar to foldback current limiting, but employs a timer rather than a variable current limit. If the MAX1714 output voltage is under 70% of the nominal value 20ms after coming out of shutdown, the PWM is latched off and won't restart until VCC power is cycled or SHDN is toggled. Under- voltage protection can be defeated using the no-fault test mode. No-Fault Test Mode The over/undervoltage protection features can complicate the process of debugging prototype breadboards, since there are (at most) a few milliseconds in which to determine what went wrong. Therefore, a test mode is provided to totally disable the OVP, UVP, and thermal shutdown features, and clear the fault latch if it has been set. The PWM operates as if SKIP were grounded (PFM/PWM mode). The no-fault test mode is entered by sinking 1.5mA from SKIP through an external negative voltage source in series with a resistor (Figure 6). SKIP is clamped to AGND with a silicon diode, so choose a resistor value of approximately (VFORCE - 0.65V) / 1.5mA. Power-Good Output (PGOOD) The output voltage is continuously monitored for undervoltage by the PGOOD comparator. In shutdown, standby, and soft-start, PGOOD is actively held low. After digital soft-start has terminated, PGOOD is released if the digital output is within 6% of the errorcomparator threshold. The PGOOD output is a true open-drain type with no parasitic ESD diodes. Note that the PGOOD undervoltage detector is completely independent of the output UVP fault detector. Design Procedure Component selection for the MAX1714 is primarily dictated by the following four criteria: 1) Input voltage range. The maximum value (VIN(MAX)) must accommodate the worst-case high AC adapter voltage. The minimum value (VIN(MIN)) must account for the lowest battery voltage after drops due to connectors, fuses, and battery selector switches. If there is a choice at all, lower input voltages result in better efficiency. Output Overvoltage Protection The overvoltage protection (OVP) circuit is available in the MAX1714A only, and is designed to protect against a shorted high-side MOSFET by drawing high current and blowing the battery fuse. The output voltage is continuously monitored for overvoltage. If the output is more than 12.5% above the trip level of the error amplifier, overvoltage protection (OVP) is triggered and the circuit shuts down. The DL low-side gate-driver output is then latched high until SHDN is toggled or VCC power is 14 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 Table 3. Operating Mode Truth Table SHDN 0 1 SKIP X DL High MODE Shutdown No Fault COMMENTS Low-power shutdown state. DL is forced to VDD, enforcing OVP. ICC < 1A typ. Test mode with OVP, UVP, and thermal faults disabled and latches cleared. Otherwise normal operation, with automatic PWM/PFM switchover for pulse skipping at light loads (Figure 6). Low-noise operation with no automatic switchover. Fixed-frequency PWM action is forced regardless of load. Inductor current reverses at light load levels. Low noise, high IQ. Normal operation with automatic PWM/PFM switchover for pulse skipping at light loads. Best light-load efficiency. Fault latch has been set by OVP, output UVLO, or thermal shutdown. Device will remain in FAULT mode until VCC power is cycled, SKIP is forced below ground (Figure 6), or SHDN is toggled. Below Switching AGND 1 VCC Switching Run (PWM), Low Noise Run (PFM/PWM) Fault 1 AGND Switching 1 X High 2) Maximum load current. There are two values to consider. The peak load current (ILOAD(MAX)) determines the instantaneous component stresses and filtering requirements, and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and other critical heat-contributing components. Modern notebook CPUs generally exhibit: ILOAD = ILOAD(MAX) * 80% 3) Switching frequency. This choice determines the basic trade-off between size and efficiency. The optimal frequency is largely a function of maximum input voltage, due to MOSFET switching losses that are proportional to frequency and VIN2. The optimum frequency is also a moving target, due to rapid improvements in MOSFET technology that are making higher frequencies more practical (Table 4). 4) Inductor operating point. This choice provides trade-offs between size vs. efficiency. Low inductor values cause large ripple currents, resulting in the smallest size, but poor efficiency and high output ripple. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values lower than this grant no further size-reduction benefit. The MAX1714's pulse-skipping algorithm initiates skip mode at the critical conduction point. So, the inductor operating point also determines the load-current value at which PFM/PWM switchover occurs. These four factors impact the component selection process. Selecting components and calculating their effect on the MAX1714's operation is best done with a spreadsheet. Using the formulas provided, calculate the LIR (the ratio of the inductor ripple current to the designed maximum load current) for both the minimum and maximum input voltages. Maintaining an LIR within a 20% to 50% range is prudent. The use of a spreadsheet allows quick evaluation of component selection. MAX1714 SKIP APPROXIMATELY -0.65V 1.5mA VFORCE (GND) AGND ( ) ARE FOR THE MAX1714B ONLY. Figure 6. Disabling Over/Undervoltage Protection (No-Fault Test Mode) ______________________________________________________________________________________ 15 High-Speed Step-Down Controller for Notebook Computers MAX1714 Inductor Selection The switching frequency and inductor operating point determine the inductor value as follows: VOUT (VIN - VOUT ) L= VIN f LIR I LOAD(MAX) Example: ILOAD(MAX) = 8A, VIN = 7V, VOUT = 1.5V, f = 300kHz, 33% ripple current or LIR = 0.33. L= 1.5V (7V -1.5V) = 1.49H 7V 300kHz 0.33 8A The amount of output sag is also a function of the maximum duty factor, which can be calculated from the ontime and minimum off-time: VSAG = where DUTY = K (VOUT + 0.075V) VIN K (VOUT + 0.075V) VOUT + min off - time 2 CF DUTY (VIN(MIN) - VOUT ) (I LOAD(MAX) )2 L Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK). IPEAK = ILOAD(MAX) + [(LIR / 2) * ILOAD(MAX)] Most inductor manufacturers provide inductors in standard values, such as 1.0H, 1.5H, 2.2H, 3.3H, etc. Also look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. For example, Sumida offers 3.1H and 4.4H in their CDRH125 series. If using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled inductance values. and minimum off-time = 400ns typ (see Table 5 for K values). The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as: L IPEAK 2 VSOAR 2COUT VOUT where IPEAK is the peak inductor current. Setting the Current Limit The minimum current-limit threshold must be high enough to support the maximum load current. The valley of the inductor current occurs at ILOAD(MAX) minus half of the ripple current (Figure 4); therefore: ILIMIT(LOW) > ILOAD(MAX) - (LIR / 2) ILOAD(MAX) where ILIMIT(LOW) equals minimum current-limit threshold voltage divided by the R DS(ON) of Q2. For the MAX1714, the minimum current-limit threshold using the 100mV default setting is 90mV. Use the worst-case maximum value for RDS(ON) from the MOSFET Q2 data sheet, and add some margin for the rise in RDS(ON) with temperature. A good general rule is to allow 0.5% additional resistance for each C of temperature rise. Examining the 8A circuit example with a maximum RDS(ON) = 12m at high temperature reveals the following: ILIMIT(LOW) = 90mV / 12m = 7.5A This 7.5A is greater than the valley current of 6.7A, so the circuit can easily deliver the full rated 8A using the default 100mV nominal ILIM threshold. For an adjustable threshold, connect a two-resistor divider from REF to AGND, with ILIM connected at the center tap. The external adjustment range of 0.5V to 2.0V corresponds to a current-limit threshold of 50mV to 200mV. When adjusting the current limit, use 1% tolerance resistors to prevent a significant increase of errors in Transient Response The inductor ripple current also impacts transientresponse performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. Table 4. Frequency Selection Guidelines FREQUENCY (kHz) 200 TON = VCC 300 TON = Float 450 TON = REF TYPICAL APPLICATION 4-cell Li+ notebook 4-cell Li+ notebook COMMENTS Use for absolute best efficiency. Considered mainstream by current standards. Useful in 3-cell systems for lighter loads than the 3-cell Li+ notebook CPU core or where size is key. Good operating point for compound buck designs or desktop circuits. 600 +5V input TON = AGND 16 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers the current-limit tolerance. A 1A minimum divider current is recommended. Output Capacitor Selection The output filter capacitor must have low enough effective series resistance (ESR) to meet output ripple and loadtransient requirements, yet have high enough ESR to satisfy stability requirements. Also, the capacitance value must be high enough to absorb the inductor energy going from a full-load to no-load condition without tripping the overvoltage protection circuit. In CPU VCORE converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance: VDIP RESR I LOAD(MAX) In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple: Vp - p RESR LIR I LOAD(MAX) The actual microfarad capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, and other electrolytics). When using low-capacity filter capacitors such as ceramic or polymer types, capacitor size is usually determined by the capacity needed to prevent VSAG and VSOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (also, see the VSAG and VSOAR equation in the Transient Response section). Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz. In the design example used for inductor selection, the ESR needed to support 50mVp-p ripple is 60mV/2.7A = 22m. Two 470F/4V Kemet T510 low-ESR tantalum capacitors in parallel provide 22m max ESR. Their typical combined ESR results in a zero at 27kHz, well within the bounds of stability. Don't put high-value ceramic capacitors directly across the feedback sense point without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic, unstable operation. However, it's easy to add enough series resistance by placing the capacitors a couple of inches downstream from the feedback sense point, which should be as close as possible to the inductor (see the All-Ceramic-Capacitor Application section). Unstable operation manifests itself in two related but distinctly different ways: double-pulsing and fast-feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there isn't enough voltage ramp in the output voltage signal. This "fools" the error comparator into triggering a new cycle immediately after the 400ns minimum off-time period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillations at the output after line or load perturbations that can trip the overvoltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output voltage ripple envelope for overshoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Don't allow more than one cycle of ringing after the initial step-response under- or overshoot. MAX1714 Output Capacitor Stability Considerations Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation: f f ESR = where f ESR = 2 RESR CF 1 Input Capacitor Selection The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents. Nontantalum chemistries (ceramic, aluminum, or OSCON) are preferred due to their resistance to power-up surge currents. VOUT VIN - VOUT I RMS = ILOAD VIN For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz. ( ) ______________________________________________________________________________________ 17 High-Speed Step-Down Controller for Notebook Computers MAX1714 For optimal circuit reliability, choose a capacitor that has less than 10C temperature rise at the peak ripple current. fy factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PC board layout characteristics. The following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a sanity check using a thermocouple mounted on Q1. PD(Q1 switching) = CRSS VIN(MAX)2 f ILOAD IGATE Power MOSFET Selection Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability (>5A) when using high-voltage (>20V) AC adapters. Low-current applications usually require less attention. For maximum efficiency, choose a high-side MOSFET (Q1) that has conduction losses equal to the switching losses at the optimum battery voltage (15V). Check to ensure that the conduction losses at minimum input voltage don't exceed the package thermal limits or violate the overall thermal budget. Check to ensure that conduction losses plus switching losses at the maximum input voltage don't exceed the package ratings or violate the overall thermal budget. Choose a low-side MOSFET (Q2) that has the lowest possible RDS(ON), comes in a moderate to small package (i.e., SO-8), and is reasonably priced. Ensure that the MAX1714 DL gate driver can drive Q2; in other words, check that the gate isn't pulled up by the highside switch turn on, due to parasitic drain-to-gate capacitance, causing cross-conduction problems. Switching losses aren't an issue for the low-side MOSFET, since it's a zero-voltage switched device when used in the buck topology. where CRSS is the reverse transfer capacitance of Q1 and IGATE is the peak gate-drive source/sink current (1A typical). For the low-side MOSFET, Q2, the worst-case power dissipation always occurs at maximum battery voltage: PD(Q2) = (1 - VOUT / VIN(MAX)) * ILOAD2 * RDS(ON) The absolute worst case for MOSFET power dissipation occurs under heavy overloads that are greater than ILOAD(MAX) but are not quite high enough to exceed the current limit and cause the fault latch to trip. To protect against this possibility, you must "overdesign" the circuit to tolerate ILOAD = ILIMIT(HIGH) + [(LIR / 2) * ILOAD(MAX)], where ILIMIT(HIGH) is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and on-resistance variation. This means that the MOSFETs must be very well heatsinked. If short-circuit protection without overload protection is enough, a normal ILOAD value can be used for calculating component stresses. Choose a Schottky diode D1 having a forward voltage low enough to prevent the Q2 MOSFET body diode from turning on during the dead time. As a general rule, a diode having a DC current rating equal to 1/3 of the load current is sufficient. This diode is optional, and if efficiency isn't critical it can be removed. MOSFET Power Dissipation Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET, the worst-case power dissipation due to resistance occurs at minimum battery voltage: PD(Q1 Resistive) = (VOUT / VIN(MIN)) * ILOAD2 * RDS(ON) Generally, a small high-side MOSFET is desired to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power-dissipation limits often limits how small the MOSFET can be. Again, the optimum occurs when the switching (AC) losses equal the conduction (RDS(ON)) losses. High-side switching losses don't usually become an issue until the input is greater than approximately 15V. Switching losses in the high-side MOSFET can become an insidious heat problem when maximum AC adapter voltages are applied, due to the squared term in the CV2F switching loss equation. If the high-side MOSFET you've chosen for adequate RDS(ON) at low battery voltages becomes extraordinarily hot when subjected to VIN(MAX), you must reconsider your choice of MOSFET. Calculating the power dissipation in Q1 due to switching losses is difficult, since it must allow for difficult-to-quanti18 Application Issues Dropout Performance The output voltage adjust range for continuous-conduction operation is restricted by the nonadjustable 500ns (max) minimum off-time one-shot. For best dropout performance, use the slowest (200kHz) on-time setting. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for onand off-times. Manufacturing tolerances and internal propagation delays introduce an error to the TON K-factor. This error is greater at higher frequencies (Table 5). Also, keep in mind that transient response performance of buck regulators operated close to dropout is poor, ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 +5V VIN = 7V TO 24V* 1F 20 C1 V+ ON/OFF ILIM VCC VDD BST 1F 5 Q1 0.1F SHDN MAX1714 SKIP DH 0.5H R1 2.5V AT 7A LX FB DL Q2 R2 1k C2 CPU 0.22F REF PGND (GND) AGND (GND) OUT TON * FOR HIGHER MINIMUM INPUT VOLTAGE, * LESS OUTPUT CAPACITANCE IS ACCEPTABLE. C1 = 2 x 10F/25V TAIYO YUDEN (1812) (TMK432BJ106AM) C2 = 6 x 47F/6.3V TAIYO YUDEN (1812) (JMK432BJ476MN) R1 + R2 = 5m MINIMUM OF PCB TRACE RESISTANCE (TOTAL) ( ) ARE FOR THE MAX1714B ONLY. Figure 7. All-Ceramic-Capacitor Application Table 5. Approximate K-Factor Errors TON K SETTING FACTOR (kHz) (s) 200 300 450 600 5 3.3 2.2 1.7 APPROXIMATE K-FACTOR ERROR (%) 10 10 12.5 12.5 MIN VIN AT VOUT = 2V (V) 2.6 2.9 3.2 3.6 Remember to include inductor resistance and MOSFET on-state voltage drops (VSW) when doing worst-case dropout duty-factor calculations. All-Ceramic-Capacitor Application Ceramic capacitors have advantages and disadvantages. They have ultra-low ESR, are noncombustible, are relatively small, and are nonpolarized. On the other hand, they're expensive and brittle, and their ultra-low ESR characteristic can result in excessively high ESR zero frequencies (affecting stability). In addition, their relatively low capacitance value can cause output overshoot when going abruptly from full-load to no-load conditions, unless there are some bulk tantalum or electrolytic capacitors in parallel to absorb the stored energy in the inductor. In some cases, there may be no room for electrolytics, creating a need for a DC-DC design that uses nothing but ceramics. The all-ceramic-capacitor application of Figure 7 replaces the standard, typical tantalum output capacitors with ceramics in a 7A circuit. This design relies on having a minimum of 5m parasitic PC board trace resistance in series with the capacitor in order to reduce the ESR zero frequency. This small amount of resistance is easily obtained by locating the MAX1714 circuit 2 or 3 inches away from the CPU, and placing all the ceramic 19 and bulk output capacitance must often be added (see the VSAG equation in Transient Response section). Dropout Design Example: VIN = 3V min, VOUT = 2V, f = 300kHz. The required duty is (VOUT + VSW) / (VIN VSW) = (2V + 0.1V) / (3.0V - 0.1V) = 72.4%. The worstcase on-time is (VOUT + 0.075) / VIN * K = 2.075V / 3V * 3.35s-V * 90% = 2.08s. The IC duty-factor limitation is: DUTY = t ON(MIN) t ON(MIN) + t OFF(MAX) = 2.08s 2.08s + 500ns = 80.6%, which meets the required duty. ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 capacitors close to the CPU. Resistance values higher than 5m just improve the stability (which can be observed by examining the load-transient response characteristic as shown in the Typical Operating Characteristics). Avoid adding excess PC board trace resistance, as there's an efficiency penalty; 5m is sufficient for a 7A circuit. 1 RESR 2FCOUT VSOAR determines the minimum output capacitance requirement. In this example, the switching frequency has been increased to 600kHz and the inductor value has been reduced to 0.5H (compared to 300kHz and 1.5H for the standard 8A circuit) in order to minimize the energy transferred from inductor to capacitor during load-step recovery. The overshoot must be calculated to avoid tripping the OVP latch. The efficiency penalty for operating at 600kHz is about 2% to 3%, depending on the input voltage. An optional 1k resistor is placed in series with OUT. This resistor attenuates high-frequency noise in some boards, which can cause double pulsing. Fixed Output Voltages The MAX1714's Dual ModeTM operation allows the selection of common voltages without requiring external components (Figure 8). Connect FB to AGND for a fixed +2.5V output or to VCC for a +3.3V output, or connect FB directly to OUT for a fixed +1.0V output. Setting VOUT with a Resistor-Divider The output voltage can be adjusted with a resistordivider if desired (Figure 9). The equation for adjusting the output voltage is: R1 VOUT = VFB 1 + R2 where VFB is 1.0V. 2-Stage (5V Powered) Notebook CPU Buck Regulator The most efficient and overall cost-effective solution for stepping down a high-voltage battery to a very low output voltage is to use a single-stage buck regulator that's powered directly from the battery. However, there may be situations where the battery bus can't be routed near the CPU, or where space constraints dictate the smallest possible local DC-DC converter. In such cases, the 5V powered circuit of Figure 10 may be appropriate. The reduced input voltage allows a higher switching frequency and a much smaller inductor value. OUT PC Board Layout Guidelines Careful PC board layout is critical to achieving low switching losses and clean, stable operation. The switching power stage requires particular attention (Figure 11). If possible, mount all of the power components on the top side of the board with their ground terminals flush against one another. Follow these guidelines for good PC board layout: * Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. * Connect AGND and PGND together close to the IC. For the MAX1714B, these grounds are connected internally to the GND pin. Carefully follow the grounding instructions under step 4 of the Layout Procedure. * Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PC boards (2 oz vs. 1 oz) can enhance full-load efficiency by 1% or more. Correctly routing PC board traces is a difficult task that must be approached in terms of fractions of centimeters, Dual Mode is a trademark of Maxim Integrated Products. TO ERROR AMP FIXED 2.5V MAX1714 FIXED 3.3V FB 2V 0.2V Figure 8. Feedback Mux 20 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers VBATT DH VOUT DL PGND (GND) OUT FB R2 AGND (GND) ( ) ARE FOR THE MAX1714B ONLY. Layout Procedure 1) Place the power components first, with ground terminals adjacent (Q2 source, CIN-, COUT-, D1 anode). If possible, make all these connections on the top layer with wide, copper-filled areas. 2) Mount the controller IC adjacent to MOSFET Q2, preferably on the back side opposite Q2 in order to keep LX, PGND, and the DL gate-drive lines short and wide. The DL gate trace must be short and wide, measuring 10 to 20 squares (50 to 100 mils wide if the MOSFET is 1 inch from the controller IC). 3) Group the gate-drive components (BST diode and capacitor, VDD bypass capacitor) together near the controller IC. 4) Make the DC-DC controller ground connections as shown in Figure 11. This diagram can be viewed as having three separate ground planes: output ground, where all the high-power components go; the PGND plane, where the PGND pin and VDD bypass capacitor go; and an analog AGND plane, where sensitive analog components go. The analog ground plane and PGND plane must meet only at a single point directly beneath the IC. For the MAX1714B, this point should be the GND pin. These two planes are then connected to the high-power output ground with a short connection from VDD cap/PGND to the source of the low-side MOSFET, Q2 (the middle of the star ground). This point must also be very close to the output capacitor ground terminal. 5) Connect the output power planes (VCORE and system ground planes) directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the CPU as is practical. MAX1714 MAX1714 R1 Figure 9. Setting VOUT with a Resistor-Divider where a single milliohm of excess trace resistance causes a measurable efficiency penalty. * LX and PGND connections to Q2 for current limiting must be made using Kelvin sense connections to guarantee the current-limit accuracy. With SO-8 MOSFETs, this is best done by routing power to the MOSFETs from outside using the top copper layer, while tying in PGND and LX inside (underneath) the SO-8 package. * When trade-offs in trace lengths must be made, it's preferable to allow the inductor charging path to be made longer than the discharge path. For example, it's better to allow some extra distance between the input capacitors and the high-side MOSFET than to allow distance between the inductor and the lowside MOSFET or between the inductor and the output filter capacitor. * Ensure that the OUT connection to COUT is short and direct. However, in some cases it may be desirable to deliberately introduce some trace length between the OUT inductor node and the output filter capacitor (see the All-Ceramic-Capacitor Application section). * Route high-speed switching nodes (BST, LX, DH, and DL) away from sensitive analog areas (REF, FB). * Make all pin-strap control input connections (SKIP, ILIM, etc.) to AGND or VCC rather than PGND or VDD. ______________________________________________________________________________________ 21 High-Speed Step-Down Controller for Notebook Computers MAX1714 VIN 4.5V TO 5.5V 1F 20 1F C1 4 x 10F/25V ILIM VCC ON/OFF SHDN V+ VDD BST DH 0.1F IRF7805 VOUT 2.5V AT 7A C2 3 x 470F KEMET T510 L1 0.5H MAX1714 0.22F REF LX DL PGND (GND) FB OUT IRF7805 VCC 100k PGOOD TON AGND (GND) SKIP ( ) = ARE FOR THE MAX1714B ONLY. NOTE: IN THE MAX1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN. Figure 10. 5V Powered, 7A CPU Buck Regulator Pin Configurations TOP VIEW DH 1 N.C. 2 SHDN 3 FB 4 OUT 5 ILIM 6 REF 7 AGND 8 N.C. 9 PGOOD 10 20 LX 19 BST 18 SKIP 17 V+ DH 1 SHDN 2 FB 3 OUT 4 ILIM 5 REF 6 PGOOD 7 GND 8 16 LX 15 BST 14 SKIP 13 V+ MAX1714A 16 TON 15 VCC 14 VDD 13 DL 12 PGND 11 N.C. MAX1714B 12 TON 11 VCC 10 VDD 9 DL QSOP QSOP 22 ______________________________________________________________________________________ High-Speed Step-Down Controller for Notebook Computers MAX1714 VBATT ALL ANALOG GROUNDS CONNECT TO AGND ONLY GND IN VIA TO PGND NEAR Q2 SOURCE MAX1714 VCC CIN Q1 VDD D1 Q2 COUT GND OUT REF ILIM AGND ; ; VOUT VIA TO SOURCE OF Q2 L1 VIA TO OUT NEAR COUT+ VIA TO LX CONNECT AGND TO PGND BENEATH IC, 1 POINT ONLY. SPLIT ANALOG GND PLANE AS SHOWN. NOTES: "STAR" GROUND IS USED. D1 IS DIRECTLY ACROSS Q2. INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE. Figure 11. Power-Stage PC Board Layout Example ______________________________________________________________________________________ 23 High-Speed Step-Down Controller for Notebook Computers MAX1714 Package Information QSOP.EPS 24 ______________________________________________________________________________________ |
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